PLL - Phase Locked Loop

PLL is a circuit used to generate a stable and pricised clock signal from the noisy input signal. The PLL compare the input signal with reference signal and adjust the phase and frequency of the output signal.

A PLL is a feedback control system that compares the phase of an input reference signal with a feedback signal generated by a voltage-controlled oscillator (VCO). The PLL adjusts the VCO's frequency to match the reference frequency, generating a stable clock signal.

The main components of a typical PLL are:

• Phase Detector (PD): The phase detector compares the phase of the input reference signal (usually called the "reference signal" or "reference clock") with the phase of the feedback signal (usually called the "feedback signal" or "output clock"). It produces an error signal that represents the phase difference between the two signals.
• Voltage-Controlled Oscillator (VCO): The VCO is an oscillator whose output frequency can be controlled by applying a voltage. The VCO generates the output signal of the PLL, which is usually called the "output clock" or "PLL output." The frequency of the VCO is controlled by the error signal from the phase detector.
• Loop Filter: The loop filter is a low-pass filter used to filter the error signal from the phase detector and provide a smooth control voltage to the VCO. It helps stabilize the PLL and reduce jitter in the output signal.

The operation of a PLL is as follows:

1. The phase detector continuously compares the phase of the reference signal and the feedback signal and generates an error signal.
2. The error signal is filtered by the loop filter to obtain a smooth control voltage.
3. The control voltage is applied to the VCO, which adjusts its output frequency to minimize the phase difference between the reference signal and the feedback signal.
4. The output signal of the VCO becomes the feedback signal, which is fed back to the phase detector, completing the feedback loop.